[Haiku-commits] r31018 - in haiku/trunk/src: add-ons/kernel/drivers/network/marvell_yukon/dev/mii add-ons/kernel/drivers/network/marvell_yukon/dev/msk libs/compat/freebsd_network/compat/dev/mii

korli at BerliOS korli at mail.berlios.de
Fri Jun 12 20:47:23 CEST 2009


Author: korli
Date: 2009-06-12 20:47:22 +0200 (Fri, 12 Jun 2009)
New Revision: 31018
ViewCVS: http://svn.berlios.de/viewcvs/haiku?rev=31018&view=rev

Removed:
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/miidevs.h
Modified:
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/Jamfile
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phy.c
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phyreg.h
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy.c
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy_subr.c
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/msk/if_msk.c
   haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/msk/if_mskreg.h
   haiku/trunk/src/libs/compat/freebsd_network/compat/dev/mii/miidevs
Log:
updated mii, msk to freebsd current


Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/Jamfile
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/Jamfile	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/Jamfile	2009-06-12 18:47:22 UTC (rev 31018)
@@ -14,3 +14,6 @@
 	ukphy_subr.c
 	;
 
+ObjectHdrs [ FGristFiles e1000phy$(SUFOBJ) ]
+        : [ FDirName $(TARGET_COMMON_DEBUG_OBJECT_DIR) libs compat freebsd_network ] ;
+Includes [ FGristFiles e1000phy.c ] : <src!libs!compat!freebsd_network>miidevs.h ;

Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phy.c
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phy.c	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phy.c	2009-06-12 18:47:22 UTC (rev 31018)
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/mii/e1000phy.c,v 1.18 2006/12/11 11:09:48 yongari Exp $");
+__FBSDID("$FreeBSD$");
 
 /*
  * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY.
@@ -105,7 +105,9 @@
 	MII_PHY_DESC(MARVELL, E1149),
 	MII_PHY_DESC(MARVELL, E1111),
 	MII_PHY_DESC(MARVELL, E1116),
+	MII_PHY_DESC(MARVELL, E1116R),
 	MII_PHY_DESC(MARVELL, E1118),
+	MII_PHY_DESC(MARVELL, E3016),
 	MII_PHY_DESC(xxMARVELL, E1000),
 	MII_PHY_DESC(xxMARVELL, E1011),
 	MII_PHY_DESC(xxMARVELL, E1000_3),
@@ -128,7 +130,6 @@
 	struct mii_softc *sc;
 	struct mii_attach_args *ma;
 	struct mii_data *mii;
-	int fast_ether;
 
 	esc = device_get_softc(dev);
 	sc = &esc->mii_sc;
@@ -141,10 +142,8 @@
 	sc->mii_phy = ma->mii_phyno;
 	sc->mii_service = e1000phy_service;
 	sc->mii_pdata = mii;
-	sc->mii_anegticks = MII_ANEGTICKS_GIGE;
 	mii->mii_instance++;
 
-	fast_ether = 0;
 	esc->mii_model = MII_MODEL(ma->mii_id2);
 	switch (esc->mii_model) {
 	case MII_MODEL_MARVELL_E1011:
@@ -152,55 +151,31 @@
 		if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK)
 			sc->mii_flags |= MIIF_HAVEFIBER;
 		break;
-	case MII_MODEL_MARVELL_E3082:
-		/* 88E3082 10/100 Fast Ethernet PHY. */
-		sc->mii_anegticks = MII_ANEGTICKS;
-		fast_ether = 1;
+	case MII_MODEL_MARVELL_E1149:
+		/*
+		 * Some 88E1149 PHY's page select is initialized to
+		 * point to other bank instead of copper/fiber bank
+		 * which in turn resulted in wrong registers were
+		 * accessed during PHY operation. It is believed that
+		 * page 0 should be used for copper PHY so reinitialize
+		 * E1000_EADR to select default copper PHY. If parent
+		 * device know the type of PHY(either copper or fiber),
+		 * that information should be used to select default
+		 * type of PHY.
+		 */
+		PHY_WRITE(sc, E1000_EADR, 0);
 		break;
 	}
 
 	e1000phy_reset(sc);
 
+	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
+	if (sc->mii_capabilities & BMSR_EXTSTAT)
+		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
 	device_printf(dev, " ");
+	mii_phy_add_media(sc);
+	printf("\n");
 
-#define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
-	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
-	    E1000_CR_ISOLATE);
-	if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) {
-		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
-		    E1000_CR_SPEED_10);
-		printf("10baseT, ");
-		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
-		    E1000_CR_SPEED_10 | E1000_CR_FULL_DUPLEX);
-		printf("10baseT-FDX, ");
-		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
-		    E1000_CR_SPEED_100);
-		printf("100baseTX, ");
-		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
-		    E1000_CR_SPEED_100 | E1000_CR_FULL_DUPLEX);
-		printf("100baseTX-FDX, ");
-		if (fast_ether == 0) {
-			/*
-			 * 1000BT-simplex not supported; driver must ignore
-			 * this entry, but it must be present in order to
-			 * manually set full-duplex.
-			 */
-			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
-			    sc->mii_inst), E1000_CR_SPEED_1000);
-			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
-			    sc->mii_inst),
-			    E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX);
-			printf("1000baseTX-FDX, ");
-		}
-	} else {
-		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst),
-		    E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX);
-		printf("1000baseSX-FDX, ");
-	}
-	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
-	printf("auto\n");
-#undef ADD
-
 	MIIBUS_MEDIAINIT(sc->mii_dev);
 	return (0);
 }
@@ -209,7 +184,7 @@
 e1000phy_reset(struct mii_softc *sc)
 {
 	struct e1000phy_softc *esc;
-	uint16_t reg;
+	uint16_t reg, page;
 
 	esc = (struct e1000phy_softc *)sc;
 	reg = PHY_READ(sc, E1000_SCR);
@@ -218,12 +193,13 @@
 		PHY_WRITE(sc, E1000_SCR, reg);
 		if (esc->mii_model == MII_MODEL_MARVELL_E1112) {
 			/* Select 1000BASE-X only mode. */
+			page = PHY_READ(sc, E1000_EADR);
 			PHY_WRITE(sc, E1000_EADR, 2);
 			reg = PHY_READ(sc, E1000_SCR);
 			reg &= ~E1000_SCR_MODE_MASK;
 			reg |= E1000_SCR_MODE_1000BX;
 			PHY_WRITE(sc, E1000_SCR, reg);
-			PHY_WRITE(sc, E1000_EADR, 1);
+			PHY_WRITE(sc, E1000_EADR, page);
 		}
 	} else {
 		switch (esc->mii_model) {
@@ -235,28 +211,72 @@
 			/* Disable energy detect mode. */
 			reg &= ~E1000_SCR_EN_DETECT_MASK;
 			reg |= E1000_SCR_AUTO_X_MODE;
+			if (esc->mii_model == MII_MODEL_MARVELL_E1116)
+				reg &= ~E1000_SCR_POWER_DOWN;
+			reg |= E1000_SCR_ASSERT_CRS_ON_TX;
 			break;
 		case MII_MODEL_MARVELL_E3082:
 			reg |= (E1000_SCR_AUTO_X_MODE >> 1);
+			reg |= E1000_SCR_ASSERT_CRS_ON_TX;
 			break;
+		case MII_MODEL_MARVELL_E3016:
+			reg |= E1000_SCR_AUTO_MDIX;
+			reg &= ~(E1000_SCR_EN_DETECT |
+			    E1000_SCR_SCRAMBLER_DISABLE);
+			reg |= E1000_SCR_LPNP;
+			/* XXX Enable class A driver for Yukon FE+ A0. */
+			PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001);
+			break;
 		default:
 			reg &= ~E1000_SCR_AUTO_X_MODE;
+			reg |= E1000_SCR_ASSERT_CRS_ON_TX;
 			break;
 		}
-		/* Enable CRS on TX. */
-		reg |= E1000_SCR_ASSERT_CRS_ON_TX;
-		/* Auto correction for reversed cable polarity. */
-		reg &= ~E1000_SCR_POLARITY_REVERSAL;
+		if (esc->mii_model != MII_MODEL_MARVELL_E3016) {
+			/* Auto correction for reversed cable polarity. */
+			reg &= ~E1000_SCR_POLARITY_REVERSAL;
+		}
 		PHY_WRITE(sc, E1000_SCR, reg);
+
+		if (esc->mii_model == MII_MODEL_MARVELL_E1116 ||
+		    esc->mii_model == MII_MODEL_MARVELL_E1149) {
+			page = PHY_READ(sc, E1000_EADR);
+			/* Select page 2, MAC specific control register. */
+			PHY_WRITE(sc, E1000_EADR, 2);
+			reg = PHY_READ(sc, E1000_SCR);
+			reg |= E1000_SCR_RGMII_POWER_UP;
+			PHY_WRITE(sc, E1000_SCR, reg);
+			PHY_WRITE(sc, E1000_EADR, page);
+		}
 	}
 
 	switch (MII_MODEL(esc->mii_model)) {
 	case MII_MODEL_MARVELL_E3082:
 	case MII_MODEL_MARVELL_E1112:
+	case MII_MODEL_MARVELL_E1118:
+		break;
 	case MII_MODEL_MARVELL_E1116:
-	case MII_MODEL_MARVELL_E1118:
 	case MII_MODEL_MARVELL_E1149:
+		page = PHY_READ(sc, E1000_EADR);
+		/* Select page 3, LED control register. */
+		PHY_WRITE(sc, E1000_EADR, 3);
+		PHY_WRITE(sc, E1000_SCR,
+		    E1000_SCR_LED_LOS(1) |	/* Link/Act */
+		    E1000_SCR_LED_INIT(8) |	/* 10Mbps */
+		    E1000_SCR_LED_STAT1(7) |	/* 100Mbps */
+		    E1000_SCR_LED_STAT0(7));	/* 1000Mbps */
+		/* Set blink rate. */
+		PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) |
+		    E1000_BLINK_RATE(E1000_BLINK_84MS));
+		PHY_WRITE(sc, E1000_EADR, page);
 		break;
+	case MII_MODEL_MARVELL_E3016:
+		/* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */
+		PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04);
+		/* Integrated register calibration workaround. */
+		PHY_WRITE(sc, 0x1D, 17);
+		PHY_WRITE(sc, 0x1E, 0x3F60);
+		break;
 	default:
 		/* Force TX_CLK to 25MHz clock. */
 		reg = PHY_READ(sc, E1000_ESCR);
@@ -313,12 +333,14 @@
 		speed = 0;
 		switch (IFM_SUBTYPE(ife->ifm_media)) {
 		case IFM_1000_T:
-			if (esc->mii_model == MII_MODEL_MARVELL_E3082)
+			if ((sc->mii_extcapabilities &
+			    (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0)
 				return (EINVAL);
 			speed = E1000_CR_SPEED_1000;
 			break;
 		case IFM_1000_SX:
-			if (esc->mii_model == MII_MODEL_MARVELL_E3082)
+			if ((sc->mii_extcapabilities &
+			    (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0)
 				return (EINVAL);
 			speed = E1000_CR_SPEED_1000;
 			break;
@@ -364,7 +386,8 @@
 				PHY_WRITE(sc, E1000_1GCR, gig |
 				    E1000_1GCR_MS_ENABLE);
 		} else {
-			if (esc->mii_model != MII_MODEL_MARVELL_E3082)
+			if ((sc->mii_extcapabilities &
+			    (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
 				PHY_WRITE(sc, E1000_1GCR, 0);
 		}
 		PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD);
@@ -387,8 +410,10 @@
 		/*
 		 * Only used for autonegotiation.
 		 */
-		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
+		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
+			sc->mii_ticks = 0;
 			break;
+		}
 
 		/*
 		 * check for link.
@@ -401,8 +426,10 @@
 		}
 
 		/* Announce link loss right after it happens. */
+		if (sc->mii_ticks++ == 0)
+			break;
 		if (sc->mii_ticks <= sc->mii_anegticks)
-			return (0);
+			break;
 
 		sc->mii_ticks = 0;
 		e1000phy_reset(sc);
@@ -422,18 +449,14 @@
 e1000phy_status(struct mii_softc *sc)
 {
 	struct mii_data *mii = sc->mii_pdata;
-	int bmsr, bmcr, esr, gsr, ssr, isr, ar, lpar;
+	int bmcr, bmsr, gsr, ssr, ar, lpar;
 
 	mii->mii_media_status = IFM_AVALID;
 	mii->mii_media_active = IFM_ETHER;
 
 	bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR);
-	esr = PHY_READ(sc, E1000_ESR);
 	bmcr = PHY_READ(sc, E1000_CR);
 	ssr = PHY_READ(sc, E1000_SSR);
-	isr = PHY_READ(sc, E1000_ISR);
-	ar = PHY_READ(sc, E1000_AR);
-	lpar = PHY_READ(sc, E1000_LPAR);
 
 	if (bmsr & E1000_SR_LINK_STATUS)
 		mii->mii_media_status |= IFM_ACTIVE;
@@ -441,22 +464,28 @@
 	if (bmcr & E1000_CR_LOOPBACK)
 		mii->mii_media_active |= IFM_LOOP;
 
-	if ((((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0) &&
-	    ((bmsr & E1000_SR_AUTO_NEG_COMPLETE) == 0)) ||
-	    ((ssr & E1000_SSR_LINK) == 0) ||
-	    ((ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0)) {
+	if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 &&
+	    (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) {
 		/* Erg, still trying, I guess... */
 		mii->mii_media_active |= IFM_NONE;
 		return;
 	}
 
 	if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) {
-		if (ssr & E1000_SSR_1000MBS)
+		switch (ssr & E1000_SSR_SPEED) {
+		case E1000_SSR_1000MBS:
 			mii->mii_media_active |= IFM_1000_T;
-		else if (ssr & E1000_SSR_100MBS)
+			break;
+		case E1000_SSR_100MBS:
 			mii->mii_media_active |= IFM_100_TX;
-		else
+			break;
+		case E1000_SSR_10MBS:
 			mii->mii_media_active |= IFM_10_T;
+			break;
+		default:
+			mii->mii_media_active |= IFM_NONE;
+			return;
+		}
 	} else {
 		if (ssr & E1000_SSR_1000MBS)
 			mii->mii_media_active |= IFM_1000_SX;
@@ -468,6 +497,8 @@
 		mii->mii_media_active |= IFM_HDX;
 
 	if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) {
+		ar = PHY_READ(sc, E1000_AR);
+		lpar = PHY_READ(sc, E1000_LPAR);
 		/* FLAG0==rx-flow-control FLAG1==tx-flow-control */
 		if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) {
 			mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1;
@@ -494,16 +525,19 @@
 e1000phy_mii_phy_auto(struct e1000phy_softc *esc)
 {
 	struct mii_softc *sc;
+	uint16_t reg;
 
 	sc = &esc->mii_sc;
-	if ((sc->mii_flags & MIIF_HAVEFIBER) == 0)
-		PHY_WRITE(sc, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD |
+	if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) {
+		reg = PHY_READ(sc, E1000_AR);
+		reg |= E1000_AR_10T | E1000_AR_10T_FD |
 		    E1000_AR_100TX | E1000_AR_100TX_FD |
-		    E1000_AR_PAUSE | E1000_AR_ASM_DIR);
-	else
+		    E1000_AR_PAUSE | E1000_AR_ASM_DIR;
+		PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD);
+	} else
 		PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X |
 		    E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE);
-	if (esc->mii_model != MII_MODEL_MARVELL_E3082)
+	if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
 		PHY_WRITE(sc, E1000_1GCR,
 		    E1000_1GCR_1000T_FD | E1000_1GCR_1000T);
 	PHY_WRITE(sc, E1000_CR,

Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phyreg.h
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phyreg.h	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/e1000phyreg.h	2009-06-12 18:47:22 UTC (rev 31018)
@@ -1,4 +1,4 @@
-/* $FreeBSD: src/sys/dev/mii/e1000phyreg.h,v 1.4 2006/12/11 10:43:32 yongari Exp $ */
+/* $FreeBSD$ */
 /*-
  * Principal Author: Parag Patel
  * Copyright (c) 2001
@@ -236,6 +236,16 @@
 #define E1000_SCR_TX_FIFO_DEPTH_10	0x8000
 #define E1000_SCR_TX_FIFO_DEPTH_12	0xC000
 
+/* 88E3016 only */
+#define	E1000_SCR_AUTO_MDIX		0x0030
+#define	E1000_SCR_SIGDET_POLARITY	0x0040
+#define	E1000_SCR_EXT_DISTANCE		0x0080
+#define	E1000_SCR_FEFI_DISABLE		0x0100
+#define	E1000_SCR_NLP_GEN_DISABLE	0x0800
+#define	E1000_SCR_LPNP			0x1000
+#define	E1000_SCR_NLP_CHK_DISABLE	0x2000
+#define	E1000_SCR_EN_DETECT		0x4000
+
 #define E1000_SCR_EN_DETECT_MASK	0x0300
 
 /* 88E1112 page 2 */
@@ -244,6 +254,21 @@
 #define E1000_SCR_MODE_COPPER		0x0280
 #define E1000_SCR_MODE_1000BX		0x0380
 
+/* 88E1116 page 0 */
+#define	E1000_SCR_POWER_DOWN		0x0004
+/* 88E1116, 88E1149 page 2 */
+#define	E1000_SCR_RGMII_POWER_UP	0x0008
+
+/* 88E1116, 88E1149 page 3 */
+#define E1000_SCR_LED_STAT0_MASK	0x000F
+#define E1000_SCR_LED_STAT1_MASK	0x00F0
+#define E1000_SCR_LED_INIT_MASK		0x0F00
+#define E1000_SCR_LED_LOS_MASK		0xF000
+#define E1000_SCR_LED_STAT0(x)		((x) & E1000_SCR_LED_STAT0_MASK)
+#define E1000_SCR_LED_STAT1(x)		((x) & E1000_SCR_LED_STAT1_MASK)
+#define E1000_SCR_LED_INIT(x)		((x) & E1000_SCR_LED_INIT_MASK)
+#define E1000_SCR_LED_LOS(x)		((x) & E1000_SCR_LED_LOS_MASK)
+
 #define E1000_SSR			0x11	/* special status register */
 #define E1000_SSR_JABBER		0x0001
 #define E1000_SSR_REV_POLARITY		0x0002
@@ -271,6 +296,26 @@
 #define E1000_IER_SPEED_CHANGED		0x4000
 #define E1000_IER_AUTO_NEG_ERR		0x8000
 
+/* 88E1116, 88E1149 page 3, LED timer control. */
+#define	E1000_PULSE_MASK	0x7000
+#define	E1000_PULSE_NO_STR	0	/* no pulse stretching */
+#define	E1000_PULSE_21MS	1	/* 21 ms to 42 ms */
+#define	E1000_PULSE_42MS	2	/* 42 ms to 84 ms */
+#define	E1000_PULSE_84MS	3	/* 84 ms to 170 ms */
+#define	E1000_PULSE_170MS	4	/* 170 ms to 340 ms */
+#define	E1000_PULSE_340MS	5	/* 340 ms to 670 ms */
+#define	E1000_PULSE_670MS	6	/* 670 ms to 1300 ms */
+#define	E1000_PULSE_1300MS	7	/* 1300 ms to 2700 ms */
+#define	E1000_PULSE_DUR(x)	((x) &	E1000_PULSE_MASK) 
+
+#define	E1000_BLINK_MASK	0x0700
+#define	E1000_BLINK_42MS	0	/* 42 ms */
+#define	E1000_BLINK_84MS	1	/* 84 ms */
+#define	E1000_BLINK_170MS	2	/* 170 ms */
+#define	E1000_BLINK_340MS	3	/* 340 ms */
+#define	E1000_BLINK_670MS	4	/* 670 ms */
+#define	E1000_BLINK_RATE(x)	((x) &	E1000_BLINK_MASK) 
+
 #define E1000_ISR			0x13	/* interrupt status reg */
 #define E1000_ISR_JABBER		0x0001
 #define E1000_ISR_POLARITY_CHANGE	0x0002

Deleted: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/miidevs.h

Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy.c
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy.c	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy.c	2009-06-12 18:47:22 UTC (rev 31018)
@@ -67,7 +67,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/mii/ukphy.c,v 1.20 2007/01/20 00:52:29 marius Exp $");
+__FBSDID("$FreeBSD$");
 
 /*
  * driver for generic unknown PHYs

Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy_subr.c
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy_subr.c	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/ukphy_subr.c	2009-06-12 18:47:22 UTC (rev 31018)
@@ -38,7 +38,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/mii/ukphy_subr.c,v 1.8.8.1 2006/07/19 04:40:26 yongari Exp $");
+__FBSDID("$FreeBSD$");
 
 /*
  * Subroutines shared by the ukphy driver and other PHY drivers.
@@ -112,10 +112,10 @@
 		else if ((gtcr & GTCR_ADV_1000THDX) &&
 		    (gtsr & GTSR_LP_1000THDX))
 			mii->mii_media_active |= IFM_1000_T;
+		else if (anlpar & ANLPAR_TX_FD)
+			mii->mii_media_active |= IFM_100_TX|IFM_FDX;
 		else if (anlpar & ANLPAR_T4)
 			mii->mii_media_active |= IFM_100_T4;
-		else if (anlpar & ANLPAR_TX_FD)
-			mii->mii_media_active |= IFM_100_TX|IFM_FDX;
 		else if (anlpar & ANLPAR_TX)
 			mii->mii_media_active |= IFM_100_TX;
 		else if (anlpar & ANLPAR_10_FD)

Modified: haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/msk/if_msk.c
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/msk/if_msk.c	2009-06-12 18:36:41 UTC (rev 31017)
+++ haiku/trunk/src/add-ons/kernel/drivers/network/marvell_yukon/dev/msk/if_msk.c	2009-06-12 18:47:22 UTC (rev 31018)
@@ -99,7 +99,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/msk/if_msk.c,v 1.26 2007/12/05 09:41:58 remko Exp $");
+__FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -156,6 +156,8 @@
 TUNABLE_INT("hw.msk.msi_disable", &msi_disable);
 static int legacy_intr = 0;
 TUNABLE_INT("hw.msk.legacy_intr", &legacy_intr);
+static int jumbo_disable = 0;
+TUNABLE_INT("hw.msk.jumbo_disable", &jumbo_disable);
 
 #define MSK_CSUM_FEATURES	(CSUM_TCP | CSUM_UDP)
 
@@ -188,13 +190,19 @@
 	{ VENDORID_MARVELL, DEVICEID_MRVL_8062X,
 	    "Marvell Yukon 88E8062 SX/LX Gigabit Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_8035,
-	    "Marvell Yukon 88E8035 Gigabit Ethernet" },
+	    "Marvell Yukon 88E8035 Fast Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_8036,
-	    "Marvell Yukon 88E8036 Gigabit Ethernet" },
+	    "Marvell Yukon 88E8036 Fast Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_8038,
-	    "Marvell Yukon 88E8038 Gigabit Ethernet" },
+	    "Marvell Yukon 88E8038 Fast Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_8039,
-	    "Marvell Yukon 88E8039 Gigabit Ethernet" },
+	    "Marvell Yukon 88E8039 Fast Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_8040,
+	    "Marvell Yukon 88E8040 Fast Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_8040T,
+	    "Marvell Yukon 88E8040T Fast Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_8048,
+	    "Marvell Yukon 88E8048 Fast Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_4361,
 	    "Marvell Yukon 88E8050 Gigabit Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_4360,
@@ -205,8 +213,14 @@
 	    "Marvell Yukon 88E8055 Gigabit Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_4364,
 	    "Marvell Yukon 88E8056 Gigabit Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_4365,
+	    "Marvell Yukon 88E8070 Gigabit Ethernet" },
 	{ VENDORID_MARVELL, DEVICEID_MRVL_436A,
 	    "Marvell Yukon 88E8058 Gigabit Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_436B,
+	    "Marvell Yukon 88E8071 Gigabit Ethernet" },
+	{ VENDORID_MARVELL, DEVICEID_MRVL_436C,
+	    "Marvell Yukon 88E8072 Gigabit Ethernet" },
 	{ VENDORID_DLINK, DEVICEID_DLINK_DGE550SX,
 	    "D-Link 550SX Gigabit Ethernet" },
 	{ VENDORID_DLINK, DEVICEID_DLINK_DGE560T,
@@ -216,9 +230,10 @@
 static const char *model_name[] = {
 	"Yukon XL",
         "Yukon EC Ultra",
-        "Yukon Unknown",
+        "Yukon EX",
         "Yukon EC",
-        "Yukon FE"
+        "Yukon FE",
+        "Yukon FE+"
 };
 
 static int mskc_probe(device_t);
@@ -244,16 +259,19 @@
 static int msk_handle_events(struct msk_softc *);
 static void msk_handle_hwerr(struct msk_if_softc *, uint32_t);
 static void msk_intr_hwerr(struct msk_softc *);
-static void msk_rxeof(struct msk_if_softc *, uint32_t, int);
-static void msk_jumbo_rxeof(struct msk_if_softc *, uint32_t, int);
+#ifndef __NO_STRICT_ALIGNMENT
+static __inline void msk_fixup_rx(struct mbuf *);
+#endif
+static void msk_rxeof(struct msk_if_softc *, uint32_t, uint32_t, int);
+static void msk_jumbo_rxeof(struct msk_if_softc *, uint32_t, uint32_t, int);
 static void msk_txeof(struct msk_if_softc *, int);
-static struct mbuf *msk_defrag(struct mbuf *, int, int);
 static int msk_encap(struct msk_if_softc *, struct mbuf **);
 static void msk_tx_task(void *, int);
 static void msk_start(struct ifnet *);
 static int msk_ioctl(struct ifnet *, u_long, caddr_t);
 static void msk_set_prefetch(struct msk_softc *, int, bus_addr_t, uint32_t);
 static void msk_set_rambuffer(struct msk_if_softc *);
+static void msk_set_tx_stfwd(struct msk_if_softc *);
 static void msk_init(void *);
 static void msk_init_locked(struct msk_if_softc *);
 static void msk_stop(struct msk_if_softc *);
@@ -265,9 +283,9 @@
 static int msk_status_dma_alloc(struct msk_softc *);
 static void msk_status_dma_free(struct msk_softc *);
 static int msk_txrx_dma_alloc(struct msk_if_softc *);
+static int msk_rx_dma_jalloc(struct msk_if_softc *);
 static void msk_txrx_dma_free(struct msk_if_softc *);
-static void *msk_jalloc(struct msk_if_softc *);
-static void msk_jfree(void *, void *);
+static void msk_rx_dma_jfree(struct msk_if_softc *);
 static int msk_init_rx_ring(struct msk_if_softc *);
 static int msk_init_jumbo_rx_ring(struct msk_if_softc *);
 static void msk_init_tx_ring(struct msk_if_softc *);
@@ -281,12 +299,15 @@
 static int msk_miibus_readreg(device_t, int, int);
 static int msk_miibus_writereg(device_t, int, int, int);
 static void msk_miibus_statchg(device_t);
-static void msk_link_task(void *, int);
 
-static void msk_setmulti(struct msk_if_softc *);
+static void msk_rxfilter(struct msk_if_softc *);
 static void msk_setvlan(struct msk_if_softc *, struct ifnet *);
-static void msk_setpromisc(struct msk_if_softc *);
 
+static void msk_stats_clear(struct msk_if_softc *);
+static void msk_stats_update(struct msk_if_softc *);
+static int msk_sysctl_stat32(SYSCTL_HANDLER_ARGS);
+static int msk_sysctl_stat64(SYSCTL_HANDLER_ARGS);
+static void msk_sysctl_node(struct msk_if_softc *);
 static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
 static int sysctl_hw_msk_proc_limit(SYSCTL_HANDLER_ARGS);
 
@@ -451,40 +472,44 @@
 static void
 msk_miibus_statchg(device_t dev)
 {
-	struct msk_if_softc *sc_if;
-
-	sc_if = device_get_softc(dev);
-	taskqueue_enqueue(taskqueue_swi, &sc_if->msk_link_task);
-}
-
-static void
-msk_link_task(void *arg, int pending)
-{
 	struct msk_softc *sc;
 	struct msk_if_softc *sc_if;
 	struct mii_data *mii;
 	struct ifnet *ifp;
 	uint32_t gmac;
 
-	sc_if = (struct msk_if_softc *)arg;
+	sc_if = device_get_softc(dev);
 	sc = sc_if->msk_softc;
 
-	MSK_IF_LOCK(sc_if);
+	MSK_IF_LOCK_ASSERT(sc_if);
 
 	mii = device_get_softc(sc_if->msk_miibus);
 	ifp = sc_if->msk_ifp;
-	if (mii == NULL || ifp == NULL) {
-		MSK_IF_UNLOCK(sc_if);
+	if (mii == NULL || ifp == NULL ||
+	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
 		return;
+
+	sc_if->msk_flags &= ~MSK_FLAG_LINK;
+	if ((mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) ==
+	    (IFM_AVALID | IFM_ACTIVE)) {
+		switch (IFM_SUBTYPE(mii->mii_media_active)) {
+		case IFM_10_T:
+		case IFM_100_TX:
+			sc_if->msk_flags |= MSK_FLAG_LINK;
+			break;
+		case IFM_1000_T:
+		case IFM_1000_SX:
+		case IFM_1000_LX:
+		case IFM_1000_CX:
+			if ((sc_if->msk_flags & MSK_FLAG_FASTETHER) == 0)
+				sc_if->msk_flags |= MSK_FLAG_LINK;
+			break;
+		default:
+			break;
+		}
 	}
 
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
-			sc_if->msk_link = 1;
-	} else
-		sc_if->msk_link = 0;
-
-	if (sc_if->msk_link != 0) {
+	if ((sc_if->msk_flags & MSK_FLAG_LINK) != 0) {
 		/* Enable Tx FIFO Underrun. */
 		CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, GMAC_IRQ_MSK),
 		    GM_IS_TX_FF_UR | GM_IS_RX_FF_OR);
@@ -541,17 +566,17 @@
 		msk_phy_writereg(sc_if, PHY_ADDR_MARV, PHY_MARV_INT_MASK, 0);
 		/* Disable Rx/Tx MAC. */
 		gmac = GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL);
-		gmac &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
-		GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, gmac);
-		/* Read again to ensure writing. */
-		GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL);
+		if ((GM_GPCR_RX_ENA | GM_GPCR_TX_ENA) != 0) {
+			gmac &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
+			GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, gmac);
+			/* Read again to ensure writing. */
+			GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL);
+		}
 	}
-
-	MSK_IF_UNLOCK(sc_if);
 }
 
 static void
-msk_setmulti(struct msk_if_softc *sc_if)
+msk_rxfilter(struct msk_if_softc *sc_if)
 {
 	struct msk_softc *sc;
 	struct ifnet *ifp;
@@ -568,15 +593,14 @@
 
 	bzero(mchash, sizeof(mchash));
 	mode = GMAC_READ_2(sc, sc_if->msk_port, GM_RX_CTRL);
-	mode |= GM_RXCR_UCF_ENA;
-	if ((ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) != 0) {
-		if ((ifp->if_flags & IFF_PROMISC) != 0)
-			mode &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
-		else if ((ifp->if_flags & IFF_ALLMULTI) != 0) {
-			mchash[0] = 0xffff;
-			mchash[1] = 0xffff;
-		}
+	if ((ifp->if_flags & IFF_PROMISC) != 0)
+		mode &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
+	else if ((ifp->if_flags & IFF_ALLMULTI) != 0) {
+		mode |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
+		mchash[0] = 0xffff;
+		mchash[1] = 0xffff;
 	} else {
+		mode |= GM_RXCR_UCF_ENA;
 		IF_ADDR_LOCK(ifp);
 		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 			if (ifma->ifma_addr->sa_family != AF_LINK)
@@ -589,7 +613,8 @@
 			mchash[crc >> 5] |= 1 << (crc & 0x1f);
 		}
 		IF_ADDR_UNLOCK(ifp);
-		mode |= GM_RXCR_MCF_ENA;
+		if (mchash[0] != 0 || mchash[1] != 0)
+			mode |= GM_RXCR_MCF_ENA;
 	}
 
 	GMAC_WRITE_2(sc, sc_if->msk_port, GM_MC_ADDR_H1,
@@ -622,26 +647,6 @@
 	}
 }
 
-static void
-msk_setpromisc(struct msk_if_softc *sc_if)
-{
-	struct msk_softc *sc;
-	struct ifnet *ifp;
-	uint16_t mode;
-
-	MSK_IF_LOCK_ASSERT(sc_if);
-
-	sc = sc_if->msk_softc;
-	ifp = sc_if->msk_ifp;
-
-	mode = GMAC_READ_2(sc, sc_if->msk_port, GM_RX_CTRL);
-	if (ifp->if_flags & IFF_PROMISC)
-		mode &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
-	else
-		mode |= (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
-	GMAC_WRITE_2(sc, sc_if->msk_port, GM_RX_CTRL, mode);
-}
-
 static int
 msk_init_rx_ring(struct msk_if_softc *sc_if)
 {
@@ -784,7 +789,12 @@
 		return (ENOBUFS);
 
 	m->m_len = m->m_pkthdr.len = MCLBYTES;
-	m_adj(m, ETHER_ALIGN);
+	if ((sc_if->msk_flags & MSK_FLAG_RAMBUF) == 0)
+		m_adj(m, ETHER_ALIGN);
+#ifndef __NO_STRICT_ALIGNMENT
+	else
+		m_adj(m, MSK_RX_BUF_ALIGN);
+#endif
 
 	if (bus_dmamap_load_mbuf_sg(sc_if->msk_cdata.msk_rx_tag,
 	    sc_if->msk_cdata.msk_rx_sparemap, m, segs, &nsegs,
@@ -823,25 +833,21 @@
 	bus_dma_segment_t segs[1];
 	bus_dmamap_t map;
 	int nsegs;
-	void *buf;
 
-	MGETHDR(m, M_DONTWAIT, MT_DATA);
+	m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUM9BYTES);
 	if (m == NULL)
 		return (ENOBUFS);
-	buf = msk_jalloc(sc_if);
-	if (buf == NULL) {
-		m_freem(m);
-		return (ENOBUFS);
-	}
-	/* Attach the buffer to the mbuf. */
-	MEXTADD(m, buf, MSK_JLEN, msk_jfree, (struct msk_if_softc *)sc_if, 0,
-	    EXT_NET_DRV);
 	if ((m->m_flags & M_EXT) == 0) {
 		m_freem(m);
 		return (ENOBUFS);
 	}
-	m->m_pkthdr.len = m->m_len = MSK_JLEN;
-	m_adj(m, ETHER_ALIGN);
+	m->m_len = m->m_pkthdr.len = MJUM9BYTES;
+	if ((sc_if->msk_flags & MSK_FLAG_RAMBUF) == 0)
+		m_adj(m, ETHER_ALIGN);
+#ifndef __NO_STRICT_ALIGNMENT
+	else
+		m_adj(m, MSK_RX_BUF_ALIGN);
+#endif
 
 	if (bus_dmamap_load_mbuf_sg(sc_if->msk_cdata.msk_jumbo_rx_tag,
 	    sc_if->msk_cdata.msk_jumbo_rx_sparemap, m, segs, &nsegs,
@@ -880,15 +886,16 @@
 {
 	struct msk_if_softc *sc_if;
 	struct mii_data	*mii;
+	int error;
 
 	sc_if = ifp->if_softc;
 
 	MSK_IF_LOCK(sc_if);
 	mii = device_get_softc(sc_if->msk_miibus);
-	mii_mediachg(mii);
+	error = mii_mediachg(mii);
 	MSK_IF_UNLOCK(sc_if);
 
-	return (0);
+	return (error);
 }
 
 /*
@@ -902,6 +909,10 @@
 
 	sc_if = ifp->if_softc;
 	MSK_IF_LOCK(sc_if);
+	if ((ifp->if_flags & IFF_UP) == 0) {
+		MSK_IF_UNLOCK(sc_if);
+		return;
+	}
 	mii = device_get_softc(sc_if->msk_miibus);
 
 	mii_pollstat(mii);
@@ -924,38 +935,41 @@
 
 	switch(command) {
 	case SIOCSIFMTU:
-		if (ifr->ifr_mtu > MSK_JUMBO_MTU || ifr->ifr_mtu < ETHERMIN) {
+		MSK_IF_LOCK(sc_if);
+		if (ifr->ifr_mtu > MSK_JUMBO_MTU || ifr->ifr_mtu < ETHERMIN)
 			error = EINVAL;
-			break;
+		else if (ifp->if_mtu != ifr->ifr_mtu) {
+ 			if (ifr->ifr_mtu > ETHERMTU) {
+				if ((sc_if->msk_flags & MSK_FLAG_JUMBO) == 0) {
+					error = EINVAL;
+					MSK_IF_UNLOCK(sc_if);
+					break;
+				}
+				if ((sc_if->msk_flags &
+				    MSK_FLAG_JUMBO_NOCSUM) != 0) {
+					ifp->if_hwassist &=
+					    ~(MSK_CSUM_FEATURES | CSUM_TSO);
+					ifp->if_capenable &=
+					    ~(IFCAP_TSO4 | IFCAP_TXCSUM);
+					VLAN_CAPABILITIES(ifp);
+				}
+			}
+			ifp->if_mtu = ifr->ifr_mtu;
+			msk_init_locked(sc_if);
 		}
-		if (sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_FE &&
-		    ifr->ifr_mtu > MSK_MAX_FRAMELEN) {
-			error = EINVAL;
-			break;
-		}
-		MSK_IF_LOCK(sc_if);
-		ifp->if_mtu = ifr->ifr_mtu;
-		if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
-			msk_init_locked(sc_if);
 		MSK_IF_UNLOCK(sc_if);
 		break;
 	case SIOCSIFFLAGS:
 		MSK_IF_LOCK(sc_if);
 		if ((ifp->if_flags & IFF_UP) != 0) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-				if (((ifp->if_flags ^ sc_if->msk_if_flags)
-				    & IFF_PROMISC) != 0) {
-					msk_setpromisc(sc_if);
-					msk_setmulti(sc_if);
-				}
-			} else {
-				if (sc_if->msk_detach == 0)
-					msk_init_locked(sc_if);
-			}
-		} else {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
-				msk_stop(sc_if);
-		}
+			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0 &&
+			    ((ifp->if_flags ^ sc_if->msk_if_flags) &
+			    (IFF_PROMISC | IFF_ALLMULTI)) != 0)
+				msk_rxfilter(sc_if);
+			else if ((sc_if->msk_flags & MSK_FLAG_DETACH) == 0)
+				msk_init_locked(sc_if);
+		} else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
+			msk_stop(sc_if);
 		sc_if->msk_if_flags = ifp->if_flags;
 		MSK_IF_UNLOCK(sc_if);
 		break;
@@ -963,7 +977,7 @@
 	case SIOCDELMULTI:
 		MSK_IF_LOCK(sc_if);
 		if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
-			msk_setmulti(sc_if);
+			msk_rxfilter(sc_if);
 		MSK_IF_UNLOCK(sc_if);
 		break;
 	case SIOCGIFMEDIA:
@@ -974,33 +988,35 @@
 	case SIOCSIFCAP:
 		MSK_IF_LOCK(sc_if);
 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
-		if ((mask & IFCAP_TXCSUM) != 0) {
+		if ((mask & IFCAP_TXCSUM) != 0 &&
+		    (IFCAP_TXCSUM & ifp->if_capabilities) != 0) {
 			ifp->if_capenable ^= IFCAP_TXCSUM;
-			if ((IFCAP_TXCSUM & ifp->if_capenable) != 0 &&
-			    (IFCAP_TXCSUM & ifp->if_capabilities) != 0)
+			if ((IFCAP_TXCSUM & ifp->if_capenable) != 0)
 				ifp->if_hwassist |= MSK_CSUM_FEATURES;
 			else
 				ifp->if_hwassist &= ~MSK_CSUM_FEATURES;
 		}
-		if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {
+		if ((mask & IFCAP_RXCSUM) != 0 &&
+		    (IFCAP_RXCSUM & ifp->if_capabilities) != 0)
+			ifp->if_capenable ^= IFCAP_RXCSUM;
+		if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&
+		    (IFCAP_VLAN_HWTAGGING & ifp->if_capabilities) != 0) {
 			ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
 			msk_setvlan(sc_if, ifp);
 		}
-
-		if ((mask & IFCAP_TSO4) != 0) {
+		if ((mask & IFCAP_VLAN_HWCSUM) != 0 &&
+		    (IFCAP_VLAN_HWCSUM & ifp->if_capabilities) != 0)
+			ifp->if_capenable ^= IFCAP_VLAN_HWCSUM;
+		if ((mask & IFCAP_TSO4) != 0 &&
+		    (IFCAP_TSO4 & ifp->if_capabilities) != 0) {
 			ifp->if_capenable ^= IFCAP_TSO4;
-			if ((IFCAP_TSO4 & ifp->if_capenable) != 0 &&
-			    (IFCAP_TSO4 & ifp->if_capabilities) != 0)
+			if ((IFCAP_TSO4 & ifp->if_capenable) != 0)
 				ifp->if_hwassist |= CSUM_TSO;
 			else
 				ifp->if_hwassist &= ~CSUM_TSO;
 		}
-		if (sc_if->msk_framesize > MSK_MAX_FRAMELEN &&
-		    sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_EC_U) {
-			/*
-			 * In Yukon EC Ultra, TSO & checksum offload is not
-			 * supported for jumbo frame.
-			 */
+		if (ifp->if_mtu > ETHERMTU &&
+		    (sc_if->msk_flags & MSK_FLAG_JUMBO_NOCSUM) != 0) {
 			ifp->if_hwassist &= ~(MSK_CSUM_FEATURES | CSUM_TSO);
 			ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TXCSUM);
 		}
@@ -1042,14 +1058,16 @@
 {
 	int next;
 	int i;
-	uint8_t val;
 
 	/* Get adapter SRAM size. */
-	val = CSR_READ_1(sc, B2_E_0);
-	sc->msk_ramsize = (val == 0) ? 128 : val * 4;
+	sc->msk_ramsize = CSR_READ_1(sc, B2_E_0) * 4;
 	if (bootverbose)
 		device_printf(sc->msk_dev,
 		    "RAM buffer size : %dKB\n", sc->msk_ramsize);
+	if (sc->msk_ramsize == 0)
+		return (0);
+
+	sc->msk_pflags |= MSK_FLAG_RAMBUF;
 	/*
 	 * Give receiver 2/3 of memory and round down to the multiple
 	 * of 1024. Tx/Rx RAM buffer size of Yukon II shoud be multiple
@@ -1082,7 +1100,7 @@
 static void
 msk_phy_power(struct msk_softc *sc, int mode)
 {
-	uint32_t val;
+	uint32_t our, val;

[... truncated: 2241 lines follow ...]



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